Document Type

Conference Paper

Department/Unit

Department of Computer Science

Title

Real-time in-memory checkpointing for future hybrid memory systems

Language

English

Abstract

© Copyright 2015 ACM.In this paper, we study real-time in-memory checkpointing as an effective means to improve the reliability of future large-scale parallel processing systems. Under this context, the checkpoint overhead can become a significant performance bottleneck. Novel memory system designs with upcoming non-volatile random access memory (NVRAM) technologies are emerging to address this performance issue. However, we find that those designs can still have prohibitively high checkpoint overhead and system downtime, especially when checkpoints are taken frequently to implement a reliable system. In this paper, we propose a novel in-memory checkpointing system, named Mona, for reducing the checkpoint overhead of hybrid memory systems with NVRAM and DRAM. To minimize the inmemory checkpoint overhead, Mona dynamically writes partial checkpoints from DRAM to NVRAM during application execution. To reduce the interference of partial checkpointing, Mona utilizes runtime idle periods and leverages a cost model to guide partial checkpointing decisions for individual DRAM ranks. We further develop load-balancing mechanisms to balance checkpoint overheads across different DRAM ranks. Simulation results demonstrate the eficiency and effectiveness of Mona in reducing the checkpoint overhead, downtime and restarting time.

Keywords

Checkpointing, NVRAM, Parallel computing, Phase change memory

Publication Date

2015

Source Publication Title

ICS '15: Proceedings of the 29th ACM on International Conference on Supercomputing

Start Page

263

End Page

272

Conference Location

Newport Beach, United States

Publisher

ACM

DOI

10.1145/2751205.2751212

Link to Publisher's Edition

http://dx.doi.org/10.1145/2751205.2751212

ISBN (print)

9781450335591

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